1. Field of the Invention
The present invention relates to a liquid crystal display device and, more specifically, to a liquid crystal display device with switching elements connected to data lines and scanning lines.
2. Description of the Related Art
FIG. 26 shows a structure of a liquid crystal display substrate according to the prior art. A data driver (data line driver) 5 is connected to a pixel region 7 via data lines 3. A gate driver (scanning line driver) 6 is connected to the pixel region 7 via scanning lines 4. The data driver 5 can supply data to the data lines 3. The gate driver 6 can supply scanning signals to the scanning lines 4.
The pixel region 7 has switching elements (TFTs: Thin Film Transistors) 1 and liquid crystal capacitors 2 which are arranged in a two-dimensional matrix. The TFTs 1 are n-channel MOS transistors, of which gates are connected to the scanning lines 4, drains are connected to the data lines 3, and sources are connected to an electrode 8 on an opposite substrate via the liquid crystal capacitors 2.
A main method of inspecting this liquid crystal display substrate is a method of touching probe pins to ends of each vertical and horizontal lines of the matrix, which needs a large number of probe pins, leading to an expensive inspecting apparatus. This inspection method has a great number of steps because a large number of check terminals are individually inspected. Therefore, the liquid crystal display substrate is subjected to perform display in its finished state as a panel, for a complete inspection, which is a factor causing reduced yields.
FIG. 27 shows another liquid crystal display substrate according to the prior art. On a substrate 900, provided are a shift register 911, analog switches 912, a display part 916, and a gate driver 915. The gate driver 915 is connected to the pixel region 916 via scanning lines G1 to G4 and so on to supply scanning signals to the scanning lines G1 to G4 and so on in response to gate clocks GCLK and gate start pulses GSP.
The pixel region 916 has TFTs 931 and liquid crystal capacitors 932 which are arranged in a two-dimensional matrix. The TFTs 931 are n-channel MOS transistors, of which gates are connected to scanning lines G1 to G4 and so on, drains are connected to data lines D1, D2 and so on, and sources are connected to an electrode on an opposite substrate via the liquid crystal capacitors 932.
In the analog switches 912, one end of each of input/output terminals is connected to one of data buses V1 to Vn and the other ends are connected to the data lines D1, D2 and so on. The data buses V1 to Vn are connected with a data driver after completion of an inspection and supplied with data.
The shift register 911, capable of m-stage shift, outputs shifted pulses sequentially to control lines Q1 to Qm in response to data clocks DCLK and data start pulses DSP. The control lines Q1 to Qm are connected to control terminals of the analog switches 912 respectively. When the control lines Q1 to Qm are set to be a high level, the analog switches 912 connect the data buses V1 to Vn, and, the data lines D1, D2 and so on respectively.
For the inspection of the liquid crystal display substrate, it is necessary to touch probe pins to terminals of the data buses V1 to Vn. In addition, when the number of the data buses V1 to Vn is increased, high temperature polysilicon needs to be used to operate the liquid crystal display substrate at a high speed, resulting in an expensive liquid crystal display substrate.